Boost Converter Circuit Design: The Core Calculations

A boost converter is one of the first switching topologies most hardware engineers meet, and one of the easiest to get subtly wrong. The circuit looks trivial — an inductor, a switch, a diode and a capacitor — yet the parts that matter most are the ones that never appear in the schematic’s simplicity: the duty cycle ceiling, the inductor’s ripple current, the right-half-plane zero that quietly strangles loop bandwidth, and the output capacitor’s ripple-current burden. This article walks through the boost stage from first principles, keeps the formulas to textbook level, and flags the design decisions that separate a working prototype from a reliable product. If you are moving from a buck converter circuit design to a boost, treat this as the counterpart briefing.

The boost stage and its operating cycle

The power stage of a boost converter sits between an input source and a higher-voltage output. It consists of an inductor in series with the input, a controllable switch (the low-side FET) that shunts the inductor’s far end to ground, a diode from that same node to the output, and an output capacitor across the load. A controller drives the switch with a pulse-width-modulated signal at a fixed or variable frequency, and a feedback loop adjusts the on-time to hold the output where you want it.

The operating cycle alternates between two states:

• Switch on. The inductor’s far end is pulled to ground. Current flows from the input through the inductor and the switch, building a magnetic field. The diode is reverse-biased (its anode sits near ground while its cathode is at Vout), so the output capacitor alone supplies the load.
• Switch off. The inductor current cannot stop instantly. The far end flies up until the diode forward-biases, and the inductor now delivers current through the diode to the output capacitor and load. The inductor’s voltage reverses, pulling energy out of its field and into the output.

Two consequences follow straight from this cycle, and both are often underestimated early in a design. First, the switch and the diode must each be rated for a voltage above Vout, because the off-state switch node can swing to the output rail plus a diode drop. Second, the average inductor current equals the input current, and because the output voltage is higher than the input, that input current is larger than the output current by roughly the boost ratio. In other words, the inductor, switch and input path carry more current than the load does — a boost converter is not a current-level shifter in the convenient direction.

There is also a continuity distinction worth naming. In continuous conduction mode (CCM), the inductor current never reaches zero during a cycle; in discontinuous conduction mode (DCM), it does, and the third state — inductor current parked at zero — changes the voltage relationship. Most power-supply design work at meaningful load assumes CCM, and the formulas below do too.

Duty cycle and the voltage ratio limit

In ideal CCM, the boost ratio follows the textbook relation:

Vout = Vin / (1 − D)

where D is the duty cycle, the fraction of each switching period the switch is on. Rearranged, D = 1 − Vin/Vout. A 12 V input to a 24 V output in an ideal converter needs D = 0.5; 12 V to 48 V needs D = 0.75; 5 V to 24 V needs about 0.79.

Those numbers reveal the topology’s practical ceiling. As D approaches unity, the ideal ratio heads toward infinity — but a real converter never gets there. The switch, inductor and diode all carry parasitic resistances, and the diode has a forward drop; the losses across these elements grow with the input current, which itself grows as the conversion ratio rises. Efficiency falls, and the achievable step-up ratio saturates well before D = 1. A design that needs a very high ratio from a low input is usually better served by a transformer-based topology, a tapped inductor, or a two-stage cascade rather than a single boost running at extreme duty cycle.

Two further duty-cycle rules of thumb matter in practice:

• Give the controller headroom. If your worst-case operating point needs D = 0.85, check the controller’s maximum duty limit and current-limit behaviour at that point; many parts clamp before 1.0, and some have minimum off-time that prevents D from ever reaching it.
• Watch the start-up and fault cases. At start-up, Vout is below Vin and the loop may push D high, pulling a large inrush through the inductor and diode. Soft-start and current limiting are not optional niceties here.

Also remember that the formula assumes the diode drop and switch drop are negligible compared with Vin and Vout. At low input voltages — say a single-cell or 3.3 V rail — a 0.4 V diode drop is a large fraction of the input, and the real duty cycle needed will be noticeably higher than the ideal calculation predicts. Budget for that in the controller’s duty range.

Inductor selection and input ripple

The inductor sets the ripple current, and the ripple current sets almost everything else: conduction losses, output ripple, EMI, and whether the converter stays in CCM at light load. During the on-time, the inductor sees approximately Vin across it, so the peak-to-peak ripple is:

ΔIL = (Vin × D) / (L × fsw)

where fsw is the switching frequency. This is textbook behaviour: ripple scales with input voltage and duty cycle, and inversely with inductance and frequency. Choose L so that the ripple is a sensible fraction of the average inductor current — commonly targeted somewhere around 20–40% of the full-load average — and check the result at both the minimum and maximum input voltage, because the ripple is not constant across the input range.

Because the average inductor current equals the input current, and the input current exceeds the output current by the boost ratio, the current stress on the inductor is higher than a first glance at the load suggests. The inductor’s saturation rating must exceed the peak current — average plus half the ripple — with margin, and its DC resistance directly costs efficiency. Saturation is the failure mode to respect: once the core saturates, inductance collapses, ripple explodes, and the switch current spikes.

Input ripple has a second component beyond the inductor’s own triangular ripple. The boost converter draws a pulsating current from the input: during the on-time the input supplies the inductor, and during the off-time the input current continues into the inductor but the output is fed from the inductor instead. The net effect is that the input current is discontinuous at the switching frequency unless you add an input filter capacitor close to the inductor. That capacitor carries the high-frequency component and keeps it off the source and the input traces. Its RMS current rating and its placement matter — a filter cap 20 mm away through a thin trace is not doing the job.

For a given ripple target, there is a trade-off between L and fsw: higher frequency allows a smaller inductor but raises switching losses and gate-drive loss, and can push EMI into awkward bands. Switching frequency selection is therefore a system decision, not a component afterthought.

The right-half-plane zero, in plain terms

Here is the characteristic that catches out engineers who come from buck design. In a boost converter, the control-to-output transfer function contains a zero in the right half of the complex plane — the right-half-plane zero, or RHPZ. Its effect is not subtle: it adds phase lag that increases with frequency, and no amount of loop compensation can remove it. The RHPZ limits the achievable loop bandwidth.

The intuitive explanation is energy flow. In a buck converter, when the controller decides the output is low and increases the duty cycle, the inductor is connected to the output more of the time, and energy delivery rises almost immediately. In a boost converter, increasing the duty cycle means keeping the switch on longer — which disconnects the inductor from the output for a larger fraction of the cycle. The immediate effect of “more duty” is therefore less energy delivered to the output in that cycle, before the higher inductor current builds up and eventually delivers more. The output initially moves the wrong way. That inversion is what the RHPZ represents mathematically.

What this means for the design:

• Keep the crossover frequency well below the RHPZ. A common guideline is to place loop crossover at a fraction of the RHPZ frequency — roughly a fifth or less — so the phase lag from the zero does not erode phase margin.
• Do not expect to fix it with compensation. The RHPZ is a property of the power stage’s energy-flow direction. More aggressive compensation cannot cancel a right-half-plane zero; it only destabilises the loop further.
• Accept the transient cost. A low-bandwidth loop means slower recovery from load steps. If the application needs fast transient response, the answer is more output capacitance, a higher switching frequency (which pushes the RHPZ up), or a different topology — not a higher crossover.
• Check it at the worst case. The RHPZ frequency moves with operating point: it is generally lower at higher duty cycle and lighter load. Verify the loop at the operating corner where the zero is lowest, not at the nominal point.

This is exactly the kind of behaviour that makes a boost converter circuit feel different from a buck even when the schematic looks symmetric. If the loop is unstable or rings on load steps despite textbook compensation values, check the RHPZ location before changing anything else.

Output capacitor stress and layout rules

The output capacitor in a boost converter leads a harder life than its buck counterpart, for a simple reason: it only receives current from the inductor during the off-time. During the on-time, the load is fed entirely from the capacitor. The result is a pulsating output-capacitor current with a high RMS value, and that RMS current is what heats the capacitor and shortens its life.

Design implications:

• Ripple current rating. Select the output capacitor for its RMS ripple-current rating at the switching frequency and at temperature, not just for capacitance. Electrolytics have ESR and ripple limits that bite; ceramics have excellent ripple handling but their effective capacitance falls with DC bias and temperature, so the nominal value is optimistic. Often a combination — bulk electrolytic plus ceramic — serves both ripple and transient needs.
• Output ripple voltage. The ripple has two parts: the capacitive term from charge delivered during the off-time, and the ESR term from the pulsating current. At high switching frequencies the ESR term frequently dominates, which is why low-ESR parts matter more than raw microfarads.
• Voltage rating. The capacitor sees the full output voltage plus ripple; derate the rating for margin and for the capacitance loss that comes with it.

Layout follows the same current-path logic. The loop formed by the input capacitor, inductor, switch and diode carries high di/dt and must be physically small — every millimetre of trace in that loop is parasitic inductance that turns into voltage spikes and EMI. The switch node is the noisy node: keep it short and keep it away from the feedback divider and the controller’s sensitive pins. The output capacitor should sit close to the diode cathode and the load return, so the pulsating output current does not circulate through the ground plane. The feedback trace should be taken from the output capacitor terminals, not from a point further downstream, and kept away from the inductor’s magnetic field. A single-point, quiet ground reference for the controller is worth the layout effort.

The input filter capacitor deserves the same treatment: place it close to the inductor’s input terminal so the high-frequency input current loop is local, and return it to the same ground the switch uses. Long input leads without local decoupling turn the input cable into an antenna.

Finally, remember the voltage ratings flagged at the start: the switch and diode must be rated above Vout with margin for the switch-node overshoot that layout parasitics create. A diode rated exactly at Vout is a reliability failure waiting for the first hot-plug event.

None of this is exotic — it is textbook boost behaviour, applied with the operating corners checked rather than assumed. The topology rewards engineers who calculate the duty ceiling, size the inductor for peak rather than average current, place the loop crossover below the RHPZ, and treat the output capacitor’s ripple current and the layout’s hot loops as first-class constraints. If you are selecting a controller for your next step-up rail, the boost converter ICs category lists the parts available under our own Weforsemi line, and the wider DC-DC converters section covers the surrounding topology choices.