How Does a MOSFET Work? Enhancement Mode Explained

Ask an experienced hardware engineer to explain a MOSFET and you will usually get a whiteboard sketch of a channel forming under an oxide layer, followed by a pause and the admission that the interesting part is everything the datasheet does not draw. This article walks through the device the way a design actually behaves: from the gate voltage that creates the channel, through the threshold and ohmic regions, into saturation and switching, then the gate charge and body diode that decide whether a circuit works or merely simulates well. For a definitions-first refresher before the detail below, our overview of what a MOSFET is covers the terminal names and device families.

From gate voltage to channel: enhancement mode step by step

An enhancement-mode N-channel MOSFET is built around a p-type body region with two n-type wells, one connected to the source terminal and one to the drain. The gate sits above the body on a thin insulating oxide, so it is a capacitor plate rather than a conductive connection. With the gate at source potential, the two n-wells are separated by the p-body and no path exists between drain and source; the device is off. Conventional current cannot flow from drain to source because the body-drain junction is reverse-biased in the normal drain-positive orientation. The structure is symmetric in principle, but real devices are not: source and body are shorted internally, which fixes the polarity of operation and gives the body diode discussed later.

Raise the gate voltage above the source and the gate field repels holes in the p-body surface and attracts electrons. Once the surface potential is sufficient, the electron concentration at the surface exceeds the hole concentration and the region inverts from p-type to n-type. That thin inverted layer is the channel, and it bridges the source and drain wells. The gate does not supply the charge that flows; it only modulates the conductivity of the channel. The current comes from the drain supply, and the gate voltage decides how wide the conducting path is. In an enhancement-mode device the channel is absent at zero gate bias and appears only when the gate is driven above threshold, which is why the part number is described as normally off.

For a P-channel device the polarities reverse: the body is n-type, the wells are p-type, and the gate must be pulled below the source to invert the surface and create a p-channel. In both cases the controlling quantity is the gate-to-source voltage, not the gate voltage relative to ground. This is the single most common beginner error: a high-side N-channel MOSFET with its source sitting at 12 V is not switched on by a 5 V logic signal, because the gate-to-source voltage is negative. The gate drive must be referenced to the source terminal, which is why high-side drivers and bootstrap circuits exist.

Modern planar and trench structures add refinements rather than changing the principle. Trench devices place the gate in a vertical groove so the channel runs along the trench sidewall, which increases channel width per unit of silicon area and lowers on-resistance. The textbooks still apply; only the geometry has been optimised.

Threshold voltage and the ohmic region

Threshold voltage, VGS(th), is the gate-to-source voltage at which a conductive channel is considered to exist. It is not a switch point. Datasheets specify it as a range at a small drain current, often around 250 µA, and the value varies part to part and with temperature. A device with a 1 V to 2 V threshold range may conduct meaningfully at 2.5 V, weakly at 2 V, and not reliably at all at 1.5 V over temperature. Designers who treat VGS(th) as a digital threshold discover that "typical" values and worst-case values are different numbers, and that threshold voltage falls as temperature rises, so a circuit that is marginal when cold may turn on when hot.

Once VGS comfortably exceeds threshold, the device enters the ohmic region, also called the linear or triode region. Here the channel is continuous and the drain current is roughly proportional to VDS for a given gate overdrive, which is the excess of VGS over VGS(th). The MOSFET behaves like a voltage-controlled resistor, and its resistance falls as gate overdrive increases. The practical formula engineers use for switching suitability is RDS(ON) = VDS / ID at a specified VGS, and this is the number that matters for conduction loss: P = I² × RDS(ON). Pushing the gate higher reduces RDS(ON), but with diminishing returns once the gate is well above threshold.

The boundary between ohmic and saturation is the condition VDS = VGS − VGS(th), often written as VDS(sat) or the overdrive voltage. Below that drain-source voltage the channel is continuous; above it the channel pinches off near the drain. For a switch, the goal is to operate deep in the ohmic region when on, with a gate voltage high enough that VDS(sat) is well above the actual voltage drop across the device. If the load current forces VDS above the overdrive voltage, the device leaves the ohmic region and dissipation rises sharply.

This is also where RDS(ON) specifications must be read carefully. A datasheet value quoted at VGS = 10 V does not apply to a 3.3 V logic drive. For board-level parts, small SMD MOSFETs in SOT-23, SOT-723 and SOT-883 packages are the common formats, and their RDS(ON) is often specified at 4.5 V and sometimes at 2.5 V or 1.8 V. A logic-level device is one characterised at these lower gate voltages; using a standard-gate part on a 3.3 V rail leaves it partly enhanced and dissipating far more than the headline number suggests.

Saturation region and switching transitions

In the saturation region the channel is pinched off at the drain end and the drain current is set mainly by the gate overdrive rather than by VDS. For an amplifier this is the useful region, because a small gate change produces a large current change. For a switch it is a place to pass through quickly and briefly. During a switching transition the device crosses saturation on its way between off and ohmic, and both current and voltage are simultaneously high. The instantaneous power is the product of the two, and the energy lost per transition is the integral of that product over the switching time. Switching loss therefore scales with switching frequency, and it is why gate drive strength and layout parasitics matter more at high frequency.

The transition itself has several phases defined by the gate charge curve. The gate first charges through the threshold region, where the device is barely conducting. It then passes through the plateau, where the gate voltage is approximately constant while the channel current rises and the drain voltage falls; this is the Miller plateau, and it is the period when the device is most exposed to simultaneous high voltage and current. Finally the gate continues to charge to its final drive voltage and the device settles into the ohmic region. On turn-off the sequence reverses. The plateau length depends on the gate current available and on the gate-drain capacitance, which is voltage-dependent and therefore not a single number in the datasheet.

The practical consequences are straightforward. A gate resistor slows the transition and increases switching loss but reduces ringing and EMI. A weak driver, a long gate trace, or a shared gate resistor can leave the device in the plateau long enough to overheat. During a short circuit or a heavy capacitive load, the device may be held in saturation with the full supply across it, and the safe operating area becomes the limiting specification rather than RDS(ON). Engineers checking a design should look at the gate waveform on a scope and confirm a clean, fast edge rather than trusting the simulation's ideal voltage source. For circuits that switch significant power, the guidance in our selection of power MOSFETs is worth reviewing alongside the datasheet curves.

Gate charge: why the driver matters

The gate is a capacitor, and every switching cycle requires charge to be moved into it and then removed. Total gate charge, Qg, is the integral of gate current over the switching transition, and the driver's average current is approximately Qg × fsw. A device with a large Qg at a high switching frequency can load a driver beyond its rating, slowing the edges and increasing loss. The gate charge curve in the datasheet plots VGS against Qg and makes the plateau visible; it is a more honest guide to drive requirements than the input capacitance alone, because capacitance varies strongly with voltage while the charge curve reflects the actual transition.

Three numbers are usually quoted: Qg total, Qgs (gate-source charge up to the threshold), and Qgd (gate-drain or Miller charge). Qgd is the charge that must be supplied while the drain voltage is swinging, so it directly sets the plateau length for a given gate current. The driver must sink and source this charge quickly, and it must do so without excessive ringing from the gate loop inductance. A short, tight gate loop, a driver with adequate peak current, and a resistor value chosen deliberately rather than copied from another design are the standard measures. Where isolation or high-side reference shifting is involved, the driver's common-mode behaviour matters as much as its current rating.

Static gate current is negligible once the device is settled, because the oxide is an insulator. But a floating gate is a liability: any leakage or coupling can charge the gate and turn the device on unintentionally. A pull-down resistor from gate to source, typically in the tens of kilohms, keeps an N-channel device off when the driver is unpowered or the connector is removed. This resistor is not optional in most designs, and its value must be low enough to discharge the gate in the required time but high enough not to load the driver.

Body diode and RDS(ON) in practice

The source-body short creates an intrinsic diode from source to drain in an N-channel device: anode at the source, cathode at the drain. It is forward-biased when the drain is pulled below the source, which happens in half-bridge and synchronous rectifier circuits when the low-side device is off and the inductor current continues. The body diode conducts, but its forward voltage is typically around 0.7 V and its reverse recovery is slow compared with the MOSFET channel. In synchronous buck converters the body diode conducts during dead time, and that interval contributes conduction loss and, on the following transition, recovery loss. Datasheets quote the body diode forward voltage and reverse recovery charge; designers who ignore them find efficiency that is lower than the RDS(ON) calculation predicts.

RDS(ON) in the real circuit is not the datasheet headline either. It rises with junction temperature, often substantially, so a calculation at 25 °C understates conduction loss at 100 °C. It is specified at a particular gate voltage, and it varies with drain current. It also depends on layout: the package and the copper around it form part of the thermal path, and the resistance the current actually sees includes bond wires and source metallisation. Small SMD packages have limited thermal capability, so the copper area under the drain pad is a design parameter, not a detail. A conservative approach is to calculate loss at the maximum expected junction temperature, add margin, and then verify with a thermal measurement rather than trusting the arithmetic alone.

Putting the pieces together, a reliable design process looks like this:

• Confirm the gate drive voltage available at the source reference and select a device characterised at that voltage.
• Check that the on-state VDS stays well below the overdrive voltage so the device remains in the ohmic region.
• Estimate switching loss from the gate charge curve and the driver current, not from an ideal edge time.
• Account for body diode conduction during dead time and for reverse recovery.
• Derate RDS(ON) for temperature and verify thermal performance on the board.

Our MOSFETs category lists the small SMD formats and the specifications engineers need for these checks. If you are moving from a textbook to a first layout, the most useful habit is to read the gate charge curve and the RDS(ON) conditions before the front-page numbers, because those two graphs answer the question of how does a MOSFET work in the circuit you are actually building, and they will tell you more about the finished design than any headline figure.